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Preliminary Specification Highly-Integrated Green-Mode PWM Controller www..com
SG6842
zero-load conditions, the power supply enters burst-mode. This completely shuts off PWM output. Then, the output restarts just before the supply voltage, VDD, drops below the UVLO voltage. This green-mode function enables the power supply to easily meet international power conservation requirements. For improved power conversion efficiency, the SG6842 series is manufactured using the BiCMOS process. This allows the start-up current to be reduced to 20uA, and the operating current to be reduced to 4mA. For even higher power conversion efficiency, a large start-up resistance can be used. Built-in synchronized slope compensation ensures the stability of peak current mode control. Proprietary internal compensation ensures constant output power limiting over a universal range of AC input voltages, from 90VAC to 264VAC. SG6842 controllers provide many protection functions. Pulse-by-pulse current limiting ensures a constant output current, even when short circuits occur. Should an open circuit failure occur in the feedback loop, the internal protection circuit will disable PWM output. PWM output will be disabled as long as VDD remains higher than 26V. The gate output is clamped at 18V to protect the power MOS from over-voltage damage. An external NTC thermistor can be applied to sense the ambient temperature for over temperature protection. When either over temperature conditions or VDD over voltage faults are detected, an internal latch circuit is used to latch-off the controller. The latch will reset when the temperature cools off sufficiently, or when the VDD power supply is disabled. SG6842 series controllers are available in both 8-pin DIP and SO packages.
D1 C IN VDD Rg GATE Q1 From auxiliary winding
FEATURES
Linearly decreasing PWM frequency Burst-mode at light load and zero load Low start-up current (20uA) Low operating current (4mA) Internal latch circuit for OTP, OVP Leading-edge blanking Built-in synchronized slope compensation Totem pole output with soft driving Improved EMI Constant power limit over a universal AC input range Current mode operation Cycle-by-cycle current limiting Under Voltage Lockout (UVLO) Programmable PWM frequency GATE output maximum voltage clamped at 18V VDD Over Voltage Protection (OVP) Programmable Over Temperature Protection (OTP) Very few external components are required
APPLICATIONS
General-purpose switch mode power supplies and flyback power converters, including: Power adapters Open-frame SMPS Battery Charger Adapter
DESCRIPTION
The highly integrated SG6842 series of PWM controllers provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. Under
TYPICAL APPLICATION
From bridge rectifier 127~ 373VDC RIN VIN RT RA RI SG6842 SENSE RI FB GND
RT
RS
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Preliminary Specification Highly-Integrated Green-Mode PWM Controller www..com
SG6842 PIN CONFIGURATION
MARKING DIAGRAMS
8 B: B = Linearly Decreasing Frequency + Burst-Mode: Null = Linear F: L = OTP Latch: The pin is reset when AC is disconnected. C = Hysteresis OTP : The pin is reset when the temperature cools down. V: V = OVP Latch T: D = DIP, S = SOP XXXXXXX: Wafer Lot YY: Year; WW: Week V: Assembly Location
SG6842BFVT
XXXXXXXYYWWV
GND FB VIN RI
1 2 3 4
8 7 6 5
GATE VDD SENSE RT
1
ORDERING INFORMATION
The SG6842 family of controllers is distinguished for its protection features and burst-mode functionality. Green-Mode Function: Linearly Decreasing Frequency and Burst-Mode Hysteresis OTP: OVP Latch: OTP Latch: Reset when the Reset when AC is Reset when AC is temperature cools down unplugged (L). unplugged (V). (C).
Part Number
Package
SG6842BS SG6842BD SG6842BLS SG6842BLD SG6842BCS SG6842BCD SG6842BLVS SG6842BLVD SG6842BCVS SG6842BCVD b b b b b b
8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP
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SG6842
Part Number
Green Mode Function: Linearly Decreasing Frequency Hysteresis OTP: OTP Latch: OVP Latch: Reset when the Reset when AC is Reset when AC is temperature cools down unplugged (L). unplugged (V). (C).
Package
SG6842S SG6842D SG6842LS SG6842LD SG6842CS SG6842CD SG6842LVS SG6842LVD SG6842CVS SG6842CVD b b b b b b
8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP 8-Pin SOP 8-Pin DIP
Note 1: All part numbers have the following default protection functions: a. b. OTP. PWM output is turned off when an over-temperature condition is detected. OVP. PWM output is turned off when an over-voltage condition is detected.
Note 2: Green-Mode: a. b. Linear-Mode: The PWM frequency linearly decreases from the maximum frequency of 65kHz to around 12kHz. This happens when the output load goes from a high-load state to low-load/zero-load state. Linear-Mode with Burst-Mode: After the PWM frequency linearly decreases from the maximum frequency of 65kHz to around 22kHz, the controller can enter into burst-mode. In burst-mode, PWM completely stops, and the VDD voltage begins dropping. When VDD drops to 11.75V (1.25V higher than the UVLO threshold), the SG6842 will start to send out PWM signals at a frequency of 27kHZ.
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SG6842
PIN DESCRIPTIONS
Pin No. Symbol
1 2 GND FB
Function
Ground Feedback
Description
Ground. The signal from the external compensation circuit is fed into this pin. This FB pin and the current-sense signal from Pin 6 determine the PWM duty cycle. For start-up, this pin is pulled high to the rectified line input. This pin is pulled via a resistor. Since the start-up current requirement of the SG6842 is very small, a large start-up
3
VIN
Start-Up Input
resistance can be used to minimize power loss. Under normal operation, this pin is also used to detect the line voltage. The line voltage is detected to compensate the output power limit, so that it can be kept constant over a universal AC input range A resistor from the RI pin to ground will generate a constant current source for the SG6842. This current charges an internal capacitor. This determines the switching frequency. Increasing the resistance will decrease the amplitude of the current from the current source, and thereby reduce the switching frequency. Using a 26k resistor Ri results in a 50uA constant current Ii and a 65kHz switching frequency. For over-temperature protection. An external NTC thermistor is connected from this pin to ground. The impedance of the NTC will decrease at high temperatures. Once the voltage of the RT pin drops below a fixed limit of 1.05V, PWM output will be disabled. Current sense. The sensed voltage is used for current-mode control and pulse-by-pulse current limiting. To protect against short circuits across the current-sense resistor, the controller continuously checks the SENSE pin. If a low voltage is detected, the controller will immediately shut down. Power Supply. If an open circuit failure occurs in the feedback loop, the internal protection circuit will disable PWM output as long as VDD remains higher than 26V. The totem-pole output driver for the power MOSFET. A soft driving waveform is implemented for improved EMI.
4
RI
Reference Setting
5
RT
Temperature Detection
6
SENSE
Current Sense
7 8
VDD GATE
Power Supply Driver Output
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SG6842
BLOCK DIAGRAM
RI 4 Current source O.V.P. VIN 3 R3 A1 5V
VDD Q1 8 Q2 Rg GATE
0.85V
-
+
Internal BIAS Q Q D CK RN
Soft ON/OFF Driver
UVLO 16.5V/10.5V VDD 7
o.s.c.
Green Mode Controller slope Compensation 0.15V
Rs
6
SENSE
0.85V IRT RT 5 1.05V 1 GND R2 R1 O.T.P. Bnk 5V 2 FB
RFB
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SG6842
ABSOLUTE MAXIMUM RATINGS
Symbol
VDD Iz VIN ISINK IOUT VFB VSense VRT VRI Pd R j-a TJ Ta TSTG TL
Parameter
Supply Voltage Zener Current FB/SENSE Terminal Input Voltage Error Amplifier Sink Current Gate Output Current Input Voltage to FB Pin Input Voltage to SENSE Pin Input Voltage to RT Pin Input Voltage to RI Pin Power Dissipation Thermal Resistance Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range Lead Temperature (Soldering) ESD Capability, HBM Model ESD Capability, Machine Model
Test Condition
Low Impedance Source, Zener Clamp FB, SENSE at Ta < 50C Junction-Air 10 sec 10 sec DIP SOP DIP SOP DIP SOP
Value
28 30 10 -0.3 to 5.5V 10 TBD -0.3 to 7V -0.3 to 7V -0.3 to 7V -0.3 to 7V 800 400 82.5 141 150 -40 to 125 -65 to +150 260 230 2.0 200
Unit
V V mA V mA mA V V V V mW C/W C C C C kV V
OPERATING CONDITIONS
Symbol
Vcc Ta
Parameter
Supply Voltage Operating Ambient Temperature
Min.
-30
Max.
20 85
Unit
V C
ELECTRICAL CHARACTERISTICS Feedback Input Section
Symbol
Av Zfb Ifb Voz
Parameter
Input-Voltage to Current-Sense Attenuation Input Impedance Bias Current Zero Duty-Cycle Input Voltage
Test Condition
Min.
1/3.5 3 1.2
Typ.
1/4 4.5
Max.
1/4.5 6 2
Unit
V/V k mA V
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SG6842
Current Sense Section
Symbol
Zcs TPD Vth Vth @ IIN Tdelay-lps Sense-VF
Parameter
Input Impedance Delay to Output Current Limit Threshold Voltage Threshold Voltage Change versus the Input Current of the VIN Pin The Delay Time for Limited Power Control. The Delay Time for VDD Over Voltage Protection.
Test Condition
Min.
8 0.8
Typ.
12 100 0.85 -0.15 32 32
Max.
16 200 0.9 -0.21
Unit
k nsec V V msec msec
IIN = 220 uA VFB=5V Ri=26K VDD=25V~27V Ri=26K
-0.09
Oscillator Section
Symbol
Fosc Fosc-green Fosc-goff Vg Vn Sg Fdv Fdt VDD-th-g
Parameter
Normal Mode Frequency Green-ON Mode Frequency
Test Condition
Ri=26K Ri=26K
Min.
60 20
Typ.
65 22.5
Max.
70 25 0
Unit
KHz KHz KHz V V Hz/mV
Green-OFF Mode Frequency (Burst-Mode Version) Ri=26K Green-OFF Mode Voltage at FB pin FB Pin Threshold for Beginning the Reduction of Frequency Slope for Green-Mode Modulation Frequency Variation Versus VDD Deviation Frequency Variation Versus Temp. Deviation VDD Low-Threshold Voltage to Exit Green-OFF Mode VDD=15V VDD=15V Ri=26K VDD=11 to 20V Ta=-30 to 85 + 0.8 1.5 + 1.25 1.6 2.3 60
5 5 + 1.7
% % V
VTH(OFF) VTH(OFF) VTH(OFF)
PWM Section
Symbol
DCY (MAX) DCY (MIN) Bnk
Parameter
Maximum Duty Cycle Minimum Duty Cycle (= Bnk) Leading Edge Blanking Time
Test Condition
Min.
80 260
Typ.
85 1 360
Max.
90 460
Unit
% % nsec
Output Section
Symbol
Vol Voh Tr Tf Vclamp
Parameter
Output Voltage Low Output Voltage High Rising Time Falling Time Gate Output Clamping Voltage
Test Condition
VDD= 12V, Io = 50mA VDD= 12V, Io = 50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=25V
Min.
8V 150 30
Typ.
Max.
1.5
Unit
V V
250 50 18
350 90
nsec nsec V
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SG6842
Over Temperature Protection Section
Symbol
Irt OFF
Parameter
Output Current of RT Pin Turn-Off and Latch-Off.
Test Condition
Ri=26K
Min.
64 1.015
Typ.
70 1.05
Max.
76 1.085
Unit
uA V
VOTP-LATCH- Threshold Voltage for Over Temperature Protection.
TDOTP-LATCH Over-Temperature Latch-Off Debounce. VOTPRESETON Threshold Voltage (Hysteresis) for Over Temperature Latch-Off Reset. At this Threshold, the Latch is Reset and PWM is Turned On.
2 1.05
8 1.15
16 1.25
msec V
VDD Section
Symbol
VTH(ON) VTH(OFF) IDD ST IDD OP VDD-OVP Td-VDD-OVP VDD-ZENER
Parameter
On Threshold Voltage Off Threshold Voltage Start-Up Current (VDD = 15.5V) Operating Supply Current (FB=SENSE=0V, VDD =15V, GATE Open) VDD Over Voltage Protection (Disable PWM Output). For Protection Against Open Feedback Loops. VDD Over Voltage Protection Debounce (Disable PWM Output) VDD ZENER Crowbar
Test Condition
Min.
15.5 9.5
Typ.
16.5 10.5 8
Max.
17.5 11.5 20 5 28
Unit
V V uA mA V n sec
23.5
3.7 25.5 200
IDD = 10mA
27
30
33
V
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SG6842
TYPICAL CHARACTERISTICS
This page is purposely left blank.
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SG6842
resistor Ri results in a 50uA constant current Ii, and a corresponding 65kHz switching frequency. The relationship between Ri and the switching frequency is:
OPERATION DESCRIPTION Start-Up Current
The typical start-up current is only 20uA. This allows a high resistance, low-wattage start-up resistor to be used, to minimize power loss. A 1.5 M, 0.25W, start-up resistor and a 10uF/25V VDD hold-up capacitor would be sufficient for an AC/DC adapter with a universal input range.
fPWM =
1690 R I (k )
(kHz ) ---------------------------- (1)
SG6842 controllers are designed to operate at a PWM oscillation frequencies ranging from 50kHz to 100kHz.
Operating Current
The required operating current has been reduced to 4mA. This enables higher efficiency and reduces the VDD hold-up capacitance requirement.
Leading Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a 360nsec leading-edge blanking time is built in. Conventional RC filtering is not necessary. During this blanking period, the current-limit comparator is disabled, and it cannot switch off the gate drive.
Green Mode Operation
The proprietary Green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. On-time is limited to provide protection against abnormal conditions and brownouts. To further reduce power consumption under zero-load conditions, the PWM output will be completely turned off, and the power supply will enter burst-mode. After the PWM oscillator is turned off, the IC's supply voltage VDD will drop gradually. Before the VDD voltage drops below the UVLO voltage, the PWM oscillator will be turned on again. This Green-mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using a SG6842 controller can easily meet even the most restrictive international regulations regarding standby power consumption.
Under-Voltage Lockout (UVLO)
The turn-on/turn-off thresholds are fixed internally at 16.5V/10.5V. To enable a SG6842 controller during start-up, the hold-up capacitor must first be charged to 16.5V, through the start-up resistor. The hold-up capacitor will continue to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 10.5V during this start-up process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up.
Gate Output / Soft Driving Oscillator Operation
A resistor connected from the RI pin to ground generates a constant current source for a SG6842 controller. This current is used to charge an internal capacitor. The charge of the capacitor determines the internal clock and the switching frequency. Increasing the resistance will decrease the amplitude of the current source and reduce the switching frequency. Using a 26k (c) System General Corp. - 10 Version 0.1(IRO33.0009.B0) The BiCMOS output stage of a SG6842 is a fast totem pole gate driver. Cross-conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode in order to protect the power MOSFET transistors against any harmful over-voltage gate signals. A soft driving waveform is implemented to minimize EMI. www.sg.com.tw Apr.09, 2003
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SG6842 Thermal Protection
An external NTC thermistor can be connected from the RT pin to ground. The impedance of the NTC will decrease at high temperatures. When the voltage of the RT pin drops below 1.05V, the PWM output will be latched off. After the latch is reset and cleared, the PWM will be turned on again.
Slope Compensation
The sensed voltage across the current sense resistor is used for current mode control and pulse-by-pulse current limiting. The built-in slope compensation function improves power supply stability and prevents peak current-mode control from causing sub-harmonic oscillations. With every switching cycle, a positively sloped, synchronized ramp is activated by SG6842 controllers.
Limited Power Control
The FB voltage will increase every time the output of the power supply is shorted or over-loaded. If the FB voltage remains higher than a built-in threshold (4.2V) for longer than 32msec, PWM output will then be turned off. As the PWM output is turned off, the supply voltage VDD will also begin decreasing. When VDD goes below the turn-off threshold (eg, 10.5V) the controller will be totally shut down. VDD will be charged up to the turn-on threshold voltage of 16.5V through the start-up resistor until PWM output is restarted. This protection feature will continue to be activated as long as the over-loading condition persists. This will prevent the power supply from overheating due to over loading conditions.
Constant Output Power Limit
When the SENSE voltage across the sense resistor RS reaches the threshold voltage (around 0.85V), the output GATE drive will be turned off following a small propagation delay tD. This propagation delay will introduce an additional current proportional to tD*VIN/LP. The propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltages will result in larger additional currents. Thus, under high input-line voltages the output power limit will be higher than under low input-line voltages. Over a wide range of AC input voltages, the variation can be significant. To compensate for this, the threshold voltage is adjusted by the VIN current. Since the VIN pin is connected to the rectified input line voltage through the start-up resistor, a higher line voltage will generate a higher VIN current through the VIN pin. The threshold voltage decreases if the VIN current increases. A small threshold voltage will force the output GATE drive to terminate earlier, thus reducing total PWM turn-on time, and making the output power equal to that of low line input. This proprietary internal compensation feature ensures a constant output power limit over a wide range of AC input voltages (90VAC to 264VAC).
Protection Latch Circuit
In some applications, latch operation for OVP or OTP may be necessary. For the SG6842 family, the optional built in latch function provides a versatile protection feature that does not require external components. See ordering information for a detailed description. To reset the latch circuit, it is necessary to disconnect the AC line voltage of the power supply.
Noise immunity
Noise from the current sense or the control signal may cause significant pulse width jitter, particularly in continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. The designer should avoiding long PCB traces and component leads. Compensation and filter components should be located near the SG6842. Finally, increasing the power-MOS gate resistance is advised. www.sg.com.tw Apr.09, 2003
VDD Over-Voltage Protection
VDD over-voltage protection has been built in to prevent any over voltage destruction. When VDD voltage is abnormally over 25.5V, the PWM output will be turned off. The over-voltage condition is usually caused by feedback open loop.
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SG6842
REFERENCE CIRCUIT Circuit
SG 6842
BOM
Reference
BD1 C1 C2 C3,C6,C7 C4 C5 C8 C9 C10 D1 D3 F1 L1 L2 Q1
Component
BD 1A/600V XC 0.22u EC 0.1u 250V YC 222p EC 68u/400V CC 102p/1KV EC 1200u/16V EC 680u/16V EC 10u/25V LED ZD 12V FUSE 2A/250V UU10.5 L04 DIODE
Reference
Q2 R1,R2 R3 R4 R5 R6 R8,R12 R9 R10 THER1 T1 U1 U2 U3 VZ1
Component
MOS 2A/600V R 470K 1/4W R 47 1/4W R 22 1/4W R 4.7K 1/4W R 0.5 1W R 510K 1/4W R 20K 1/8W 1% R 100 1/8W Thermistor SCK054 Transformer EI28 IC SG6842 IC 4N35D IC TL431 VZ 9G
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SG6842
PACKAGE INFORMATION DIP-8 Outline Dimensions
D
8 5
E1
E
eB
1
4
A1
A2
L b1 e b
Dimensions
Millimeters Min. Typ.
0.381 3.175 3.302 1.524 0.457 9.017 9.271 7.620 6.223 6.350 2.540 2.921 8.509 0 3.302 9.017 7 3.810 9.525 15 0.115 0.335 0 6.477 0.245 10.160 0.355 3.429
A
Inches Min.
0.015 0.125 0.130 0.060 0.018 0.365 0.300 0.250 0.100 0.130 0.355 7 0.150 0.375 15 0.255 0.400 0.135
Symbol
A A1 A2 b b1 D E E1 e L eB
Max.
5.334
Typ.
Max.
0.210
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SG6842
SOP-8 Outline Dimensions
C
8
5
E
1 b
4 e
D
A1
A
Dimensions
Millimeters Min. Typ.
1.346 0.101 0.406 0.203 4.648 0.381 1.270 0.381X45 5.791 0.406 0 6.197 1.270 8 0.228 0.016 0 4.978 3.987 0.183 0.150 0.050 0.015X45 0.244 0.050 8
Symbol
A A1 b c D E e F H L
(c) System General Corp. Version 0.1(IRO33.0009.B0)
H F
L
Max.
1.752 0.254
Inches Min.
0.053 0.004
Typ.
Max.
0.069 0.010
0.016 0.008 0.196 0.157
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SG6842
DISCLAIMERS
LIFE SUPPORT System General's products are not designed to be used as components in devices intended to support or sustain human life. Use of System General's products in components intended for surgical implant into the body, or other applications in which failure of System General's products could create a situation where personal death or injury may occur, is not authorized without the express written approval of System General's Chief Executive Officer. System General will not be held liable for any damages or claims resulting from the use of its products in medical applications.
MILITARY System General's products are not designed for use in military applications. Use of System General's products in military applications is not authorized without the express written approval of System General's Chief Executive Officer. System General will not be held liable for any damages or claims resulting from the use of its products in military applications.
RIGHT TO MAKE CHANGES System General reserves the right to change this document and/or this product without notice. Customers are advised to consult their System General sales representative before ordering. (c) System General Corp. Version 0.1(IRO33.0009.B0) - 15 www.sg.com.tw Apr.09, 2003

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